Specialized Computing in the Cloud

July 29, 2014
Martha Kim, Thomas Wenisch, and Adrian Caulfield | Columbia University, University of Michigan, Microsoft Research

The slowing and eventual ending of Moore’s Law will dramatically impact datacenter operators, who have long depended on steady advances in server performance and efficiency to make improved services economically viable. Specialization in the form of hardware accelerators (e.g., FPGAs, GPGPUs, and ASICs) can overcome performance and energy limitations but introduce challenging problems at scale, such as cost, flexibility, programmability, and the need to gracefully integrate with existing software stacks. This session will invite experts within Microsoft Research and the external research community to discuss challenges and opportunities for specialization in the cloud.

Speaker Details

Martha Kim is an Assistant Professor of Computer Science at Columbia University where she leads the ARCADE Lab. Kim’s research interests are in computer architecture, parallel programming, compilers, and low-power computing. Her work has explored low-cost chip manufacturing systems, reconfigurable communication networks, and fine-grained parallel application profiling techniques. Her current research focuses on hardware and software techniques to improve the usability of hardware accelerators as well as data-centric accelerator design. Kim holds a PhD in Computer Science and Engineering from the University of Washington and a bachelors in Computer Science from Harvard University. She is the recipient of the 2013 Rodriguez Family Award in recognition of the research achievements of underrepresented junior faculty and a 2013 NSF CAREER award.

Thomas Wenisch is the Morris Wellman Faculty Development Assistant Professor of Computer Science and Engineering at the University of Michigan, specializing in computer architecture. Tom’s prior research includes memory streaming for commercial server applications, store-wait-free multiprocessor memory systems, memory disaggregation, and rigorous sampling-based performance evaluation methodologies. His ongoing work focuses on computational sprinting, data center architecture, energy-efficient server design, and multi-core / multiprocessor memory systems. Tom received an NSF CAREER award in 2009, two papers selected in IEEE Micro Top Picks, and Best Paper Awards at HPCA 2012 and ISPASS 2012. Prior to his academic career, Tom was a software developer at American Power Conversion, where he worked on data center thermal topology estimation. He is co-inventor on six patents. Tom received his Ph.D. in Electrical and Computer Engineering from Carnegie Mellon University.

Thomas Wenisch is an Associate Professor of Computer Science and Engineering at the University of Michigan, specializing in computer architecture. His prior research includes memory streaming for commercial server applications, store-wait-free multiprocessor memory systems, memory disaggregation, and rigorous sampling-based performance evaluation methodologies. His ongoing work focuses on computational sprinting, data center architecture, energy-efficient server design, and multi-core / multiprocessor memory systems. Wenisch received the NSF CAREER award in 2009. Prior to his academic career, Wenisch was a software developer at American Power Conversion, where he worked on data center thermal topology estimation. He received his Ph.D. in Electrical and Computer Engineering from Carnegie Mellon University.