Honeycomb: Ordered Key-Value Store Acceleration on an FPGA-Based SmartNIC

  • ,
  • Aleksandar Dragojevic ,
  • Shane Fleming ,
  • Antonios Katsarakis ,
  • Dario Korolija ,
  • Igor Zablotchi ,
  • Ho-Cheung Ng ,
  • Anuj Kalia ,
  • Miguel Castro

IEEE Transactions on Computers | , Vol 73: pp. 857-871

Publication | DOI

In-memory ordered key-value stores are an important building block in modern distributed applications. We present Honeycomb, a hybrid software-hardware system for accelerating read-dominated workloads on ordered key-value stores that provides linearizability for all operations including scans. Honeycomb stores a B-Tree in host memory. It executes put, update and delete on a CPU. At the same time, it offloads scan and get onto an FPGA-based SmartNIC. This approach enables large stores and simplifies the FPGA implementation but raises the challenge of data access and synchronization across the slow PCIe bus. We describe how Honeycomb overcomes this challenge with careful data structure design, caching, request parallelism with out-of-order execution, wait-free read operations, and fast synchronization between the CPU and the FPGA. For read-heavy YCSB workloads, Honeycomb increases the throughput of a state-of-the-art ordered key-value store by at least $1.8\times$1.8×. For scan-heavy workloads inspired by cloud storage, Honeycomb increases the throughput by more than $2\times$2×. The cost-performance, which is more important for large-scale deployments, is improved by at least $1.5\times$1.5× on these workloads.