Accelerating Deep Convolutional Neural Networks Using Specialized Hardware

  • Kalin Ovtcharov ,
  • Olatunji Ruwase ,
  • Joo-Young Kim ,
  • Jeremy Fowers ,
  • ,
  • Eric Chung

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We describe the design of a convolutional neural network accelerator running on a Stratix V FPGA. The design runs at three times the throughput of previous FPGA CNN accelerator designs. We show that the throughput/watt is significantly higher than for a GPU, and project the performance when ported to an Arria 10 FPGA.